The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Nov. 03, 2015
Applicants:

Inventec (Pudong) Technology Corporation, Shanghai, CN;

Inventec Corporation, Taipei, TW;

Inventors:

Jian-Xin Huang, Shanghai, CN;

Ying-Xian Han, Shanghai, CN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 1/28 (2006.01); G06F 1/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1417 (2013.01); G06F 1/28 (2013.01); G06F 1/30 (2013.01); G06F 2201/805 (2013.01); G06F 2201/85 (2013.01);
Abstract

A power failure monitoring system and a method are disclosed herein, where the power failure monitoring system includes a motherboard, a board, a complex programmable logic device (CPLD) and a baseboard management controller (BMC) module. The motherboard includes a central processing unit (CPU) power and a non-CPU power. The board includes a board power. The BMC module includes a register that is electrically coupled to the CPLD. The CPLD is configured to execute a shutdown process when power failure occurs, identify a power failure type, and determine whether to execute a restart process according to the power failure type. If the restart process is executed and a count of the restart process reaches a predetermined count, the CPLD records lock information in the register. The BMC module is configured to record the count of the restart process, and execute a lock process according to the lock information.


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