The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Dec. 09, 2013
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Lidia Warnes, Roseville, CA (US);

Erin A Handgen, Fort Collins, CO (US);

Andrew C. Walton, Rocklin, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 11/16 (2006.01); G06F 12/0811 (2016.01); G06F 12/0831 (2016.01); G06F 12/0893 (2016.01); G06F 12/128 (2016.01); G06F 12/0875 (2016.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/106 (2013.01); G06F 11/1016 (2013.01); G06F 11/1666 (2013.01); G06F 12/0811 (2013.01); G06F 12/0833 (2013.01); G06F 12/0893 (2013.01); G06F 12/128 (2013.01); G06F 11/20 (2013.01); G06F 12/0875 (2013.01); G06F 2211/1088 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/466 (2013.01); G06F 2212/60 (2013.01); G06F 2212/621 (2013.01); G06F 2212/69 (2013.01);
Abstract

Example implementations relate to storing memory erasure information in memory devices on a memory module. In example implementations, a memory location associated with an error in a first cache line may be identified. The first cache line may include data read from the memory location, and the memory location may be in a first memory device of a plurality of memory devices on a memory module. A device number corresponding to the first memory device may be written to one of the plurality of memory devices. When the memory location is read for a second cache line, the device number corresponding to the first memory device may be retrieved. The second cache line may include the retrieved device number and data read from the memory location.


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