The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Mar. 17, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Christian Gregory Sporck, Campbell, CA (US);

Georgios Paparrizos, Foster City, CA (US);

Hector Oporta, San Jose, CA (US);

Shashank Prakash Mane, San Jose, CA (US);

Bang Sup Lee, Fremont, CA (US);

Thomas O'Brien, Powell, OH (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/04 (2006.01); H02J 7/00 (2006.01); H01R 24/60 (2011.01); G06F 9/44 (2006.01); G01R 27/02 (2006.01); H01R 107/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/04 (2013.01); G01R 27/02 (2013.01); G06F 9/4401 (2013.01); H01R 24/60 (2013.01); H02J 7/008 (2013.01); H01R 2107/00 (2013.01);
Abstract

Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when a resistance measured across across two terminals of a USB Type-C connector has a value associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance between the two terminals has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a special or factory boot mode that controls startup of at least one processor on the device based on the measured value. Each of the set of resistance values exceeds a minimum open-circuit resistance value specified for the connector.


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