The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Jul. 18, 2012
Applicants:

Peter Thorne, Basildon, GB;

Peter Knowles, Basildon, GB;

Inventors:

Peter Thorne, Basildon, GB;

Peter Knowles, Basildon, GB;

Assignee:

LEONARDO MW LTD, Essex, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/3745 (2011.01); H04N 5/33 (2006.01); H04N 5/357 (2011.01); H04N 5/365 (2011.01); H04N 5/367 (2011.01); H04N 5/335 (2011.01);
U.S. Cl.
CPC ...
H04N 5/33 (2013.01); H04N 5/357 (2013.01); H04N 5/365 (2013.01); H04N 5/367 (2013.01); H04N 5/3651 (2013.01); H04N 5/3745 (2013.01); H04N 5/335 (2013.01);
Abstract

An infrared detector system is described which includes a detector diode arrayand a non volatile memory. The non volatile memorycan use CMOS Silicon Fuse technology which can be polysilicon devices that are programmed using voltage-current-time profiles suitable for the silicon process technology, such that when applied will cause the polysilicon element to heat up rapidly and melt. This results in the fuse element going open circuit, just like blowing a known fuse. The fuse can act as a logic element that has a one time, user programmable and permanent logic state. An array of such memory cells is can be mapped to a sub pixel diode detector array.


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