The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Aug. 10, 2015
Applicant:

Stmicroelectronics (Grenoble 2) Sas, Grenoble, FR;

Inventors:

Karine Saxod, Les Marches, FR;

Marika Sorrieul, Montaud, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/146 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/56 (2013.01); H01L 23/315 (2013.01); H01L 23/3121 (2013.01); H01L 23/3171 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 27/14618 (2013.01); H01L 27/14683 (2013.01); H01L 2224/1329 (2013.01); H01L 2224/13291 (2013.01); H01L 2224/14179 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29291 (2013.01); H01L 2224/30135 (2013.01); H01L 2224/81862 (2013.01); H01L 2224/81874 (2013.01); H01L 2924/0665 (2013.01);
Abstract

A method for fabricating an electronic device, and an electronic device in a stacked configuration, includes a rear face of an integrated-circuit chip that is fixed to a front face of a support wafer. A protective wafer is located facing and at a distance from the front face of the chip, and an infused adhesive is interposed between the chip and the protective wafer and located on a zone of the front face of the chip outside a central region of this front face. The infused adhesive includes a curable adhesive and solid spacer elements infused in the curable adhesive. An obstruction barrier is arranged between the chip and the protective wafer and is disposed outside the central region of the front face of the chip. An encapsulation ring surrounds the chip, the protective wafer and the obstruction barrier.


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