The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Sep. 01, 2009
Applicants:

Akio Goto, Hatogaya, JP;

Chi Kong Lee, Fremont, CA (US);

Masayuki Urabe, Isehara, JP;

Inventors:

Akio Goto, Hatogaya, JP;

Chi Kong Lee, Fremont, CA (US);

Masayuki Urabe, Isehara, JP;

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G11C 16/10 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 7/10 (2013.01); G11C 2207/2245 (2013.01); G11C 2216/14 (2013.01);
Abstract

Systems, methods and computer program products for programming data into a multi-plane memory device employ a multi-plane data order. To allow multiple data pages to be programmed without a need to increase the size of page buffers, in some implementations, a data transfer scheme at which the data pages are programmed can be manipulated. Specifically, data across all channels can first be programmed into a first plane of the multi-plane flash memory device in parallel. While the data transfer program operation is in progress, data to be programmed into a succeeding plane (e.g., plane '1') can be read into and cached in one or more page buffers. After the data transfer program for the first plane is complete, data cached in the page buffers can be immediately latched and programmed into the multi-plane flash memory device.


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