The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Jul. 11, 2016
Applicant:

Applied Research Llc., Rockville, MD (US);

Inventor:

Chiman Kwan, Rockville, MD (US);

Assignee:

APPLIED RESEARCH LLC., Rockville, MD (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G10K 11/16 (2006.01); H03B 29/00 (2006.01); G10K 11/178 (2006.01); G10K 11/00 (2006.01);
U.S. Cl.
CPC ...
G10K 11/1784 (2013.01); G10K 11/002 (2013.01); G10K 11/178 (2013.01); G10K 2210/1081 (2013.01); G10K 2210/128 (2013.01); G10K 2210/3028 (2013.01); G10K 2210/3216 (2013.01);
Abstract

The present invention provides a system to create a quiet zone by suppressing background noise near a user's head. The present invention utilizes two microphones; one microphone receives environmental noise and the other one is located close to a person's head. A parabolic dish loudspeaker creates a uniform sound field near a user's head. A high performance frequency-domain filtered-x least mean square with band selection (FD-FX-LMS-BS) algorithm is utilized to generate the anti-phase noise signals. The algorithm has high noise reduction performance and also allows selection of specific frequency bands for noise reduction. The FD-FX-LMS-BS algorithm is performed by a field programmable gate array (FPGA) chip, which has minimal delay in algorithm processing.


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