The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2017
Filed:
Oct. 28, 2016
Applicant:
Empire Technology Development Llc, Wilmington, DE (US);
Inventor:
Miodrag Potkonjak, Los Angeles, CA (US);
Assignee:
EMPIRE TECHNOLOGY DEVELOPMENT LLC, Wilmington, DE (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); G06F 17/50 (2006.01); H01L 21/28 (2006.01); H01L 29/40 (2006.01); H01L 21/326 (2006.01); H01L 21/8234 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H03K 17/161 (2013.01); G06F 17/5045 (2013.01); H01L 21/28 (2013.01); H01L 21/326 (2013.01); H01L 21/823437 (2013.01); H01L 22/20 (2013.01); H01L 29/408 (2013.01); G06F 2217/76 (2013.01); G06F 2217/78 (2013.01); G06F 2217/84 (2013.01); H01L 22/14 (2013.01); H03K 2217/0036 (2013.01);
Abstract
A technique of reducing leakage energy associated with a post-silicon target circuit is generally described herein. One example method includes purposefully aging a plurality of gates in the target circuit based on a targeted metric including a timing constraint associated with the target circuit.