The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2017
Filed:
Sep. 15, 2016
Method, apparatus and device for operating logical operation array of resistive random access memory
Applicant:
Huawei Technologies Co., Ltd., Shenzhen, CN;
Inventors:
Xiangshui Miao, Wuhan, CN;
Yi Li, Wuhan, CN;
Yaxiong Zhou, Wuhan, CN;
Ronggang Xu, Shenzhen, CN;
Junfeng Zhao, Shenzhen, CN;
Zhulin Wei, Shenzhen, CN;
Assignee:
HUAWEI TECHNOLOGIES CO., LTD., Shenzhen, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 13/003 (2013.01); G11C 13/0007 (2013.01); G11C 13/0059 (2013.01); G11C 13/0069 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); G11C 13/0002 (2013.01); G11C 2213/78 (2013.01); G11C 2213/79 (2013.01);
Abstract
A logical operation array of a resistive random access memory includes at least one logical operation unit; each logical operation unit includes multiple resistive random access memories, multiple field effect transistor switches and a voltage converter. The logical operation array is set for performing logical operation and enable to storage output level signal in one resistive random access memory after the logical operation