The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2017

Filed:

Aug. 16, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Rajiv Kumar Roy, Bangalore, IN;

Kanika Malik, Bengaluru, IN;

Manoj Puthan Purayil, Bangalore, IN;

Vikash, Bangalore, IN;

Assignee:

ARM Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 7/10 (2006.01); G11C 7/06 (2006.01); G11C 8/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1096 (2013.01); G11C 5/14 (2013.01); G11C 7/06 (2013.01); G11C 8/10 (2013.01);
Abstract

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include core circuitry having an array of memory cells and a row decoder that accesses each of the memory cells via a selected wordline and a wordline signal. The core circuitry may operate at a first supply voltage. The integrated circuit may include periphery circuitry having a column decoder that accesses each of the memory cells via a selected bitline. The periphery circuitry may operate at a second supply voltage that is different than the first supply voltage. The periphery circuitry may include voltage differential sensing circuitry that may compare the first supply voltage to the second supply voltage, sense a voltage differential between the first and second supply voltages, and delay the wordline signal when the voltage differential is greater than a threshold voltage.


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