The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2017

Filed:

Jun. 30, 2015
Applicant:

Oracle International Corporation, Redwood Shores, CA (US);

Inventors:

Jean-Baptiste Tristan, Lexington, MA (US);

Guy L. Steele, Jr., Lexington, MA (US);

Joseph Tassarotti, Pittsburgh, PA (US);

Assignee:

Oracle International Corporation, Redwood Shores, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/17 (2006.01); G06F 17/20 (2006.01); G06N 7/00 (2006.01); G06F 9/50 (2006.01); G06F 17/27 (2006.01); G06F 17/30 (2006.01);
U.S. Cl.
CPC ...
G06N 7/005 (2013.01); G06F 9/5066 (2013.01); G06F 17/277 (2013.01); G06F 17/2785 (2013.01); G06F 17/3071 (2013.01);
Abstract

Herein is described a data-parallel and sparse algorithm for topic modeling. This algorithm is based on a highly parallel algorithm for a Greedy Gibbs sampler. The Greedy Gibbs sampler is a Markov-Chain Monte Carlo algorithm that estimates topics, in an unsupervised fashion, by estimating the parameters of the topic model Latent Dirichlet Allocation (LDA). The Greedy Gibbs sampler is a data-parallel algorithm for topic modeling, and is configured to be implemented on a highly-parallel architecture, such as a GPU. The Greedy Gibbs sampler is modified to take advantage of data sparsity while maintaining the parallelism. Furthermore, in an embodiment, implementation of the Greedy Gibbs sampler uses both densely-represented and sparsely-represented matrices to reduce the amount of computation while maintaining fast accesses to memory for implementation on a GPU.


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