The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Feb. 12, 2014
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Chia-Yun Cheng, Zhubei, TW;

Huei-Min Lin, Zhubei, TW;

Yung-Chang Chang, New Taipei, TW;

Assignee:

MEDIATEK INC., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 19/436 (2014.01); H04N 19/82 (2014.01); H04N 19/86 (2014.01); H04N 19/51 (2014.01);
U.S. Cl.
CPC ...
H04N 19/00915 (2013.01); H04N 19/436 (2014.11); H04N 19/82 (2014.11); H04N 19/865 (2014.11); H04N 19/51 (2014.11);
Abstract

A method and apparatus for deblocking process using multiple processing units are disclosed. The video image is divided into at least two regions. The in-loop filter is applied to block boundaries associated with said at least two regions using multiple processing units. The in-loop filter is re-applied to one or more second block boundaries adjacent to region edge between two regions after applying the in-loop filter to the first block boundaries adjacent to the region edge. Furthermore, at least a first portion of said applying the in-loop filter to the first block boundaries and a second portion of said applying the in-loop filter to the second block boundaries are performed concurrently. The multiple processing units may correspond to multiple processing cores within one processor chip.


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