The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2017

Filed:

Jan. 22, 2014
Applicants:

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Hailin Xue, Beijing, CN;

Yubo Xu, Beijing, CN;

Cheng Li, Beijing, CN;

Jidong Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 29/12 (2006.01); H01L 29/786 (2006.01); H01L 29/15 (2006.01); G02F 1/136 (2006.01); H01L 21/00 (2006.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01); G02F 1/1345 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/1345 (2013.01); G02F 1/136286 (2013.01); H01L 27/1255 (2013.01); G02F 2201/121 (2013.01);
Abstract

A thin film transistor (TFT) array substrate is disclosed and having a pixel region and a peripheral region surrounding the pixel region, and the pixel region comprises horizontal gate lines, longitudinal data lines defining pixel units with the horizontal gate lines, and storage capacitor electrode (Vcom) lines. The peripheral region comprises at least one peripheral common electrode line which is electrically connected with an integrated-circuit (IC) element. The Vcom lines are connected with the peripheral common electrode line through one or more Vcom line IC terminals.


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