The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2017

Filed:

Sep. 14, 2015
Applicant:

Intersil Americas Llc, Milpitas, CA (US);

Inventors:

Shuai Jiang, San Jose, CA (US);

Zhixiang Liang, San Ramon, CA (US);

Jian Yin, San Ramon, CA (US);

Assignee:

INTERSIL AMERICAS LLC, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/157 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/157 (2013.01); H02M 2001/0025 (2013.01);
Abstract

Auto-compensation—for compensating voltage regulators generating a regulated output voltage—may be performed dynamically by determining various coefficients of a compensation function used in compensating the power regulator, based at least on assumptions about the structure of the regulator and corresponding filters. At least the DC loop gain and the position of the compensation zeros may be determined without requiring any prior knowledge of the values of the various components of the system. The compensator coefficients may be adjusted based on duty-cycle jitter information, which may be accurately obtained/measured at a high signal-to-noise ratio. By observing the duty-cycle jitter, the capacitor (equivalent series resistance) may be optimally compensated by tuning the 0 dB crossover slope of the loop gain. Accordingly, auto-compensation may be performed by measuring the duty-cycle jitter while maintaining optimum stability and transient performance.


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