The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2017

Filed:

Jan. 30, 2016
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventor:

Atsushi Amo, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01); H01L 29/94 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 27/06 (2006.01); H01L 27/11573 (2017.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/945 (2013.01); G11C 16/0466 (2013.01); H01L 27/0629 (2013.01); H01L 27/11573 (2013.01); H01L 29/42344 (2013.01); H01L 29/66181 (2013.01); H01L 29/66833 (2013.01); H01L 29/792 (2013.01);
Abstract

In a semiconductor device including a split gate type MONOS memory, and a trench capacitor element having an upper electrode partially embedded in trenches formed in the main surface of a semiconductor substrate, merged therein, the flatness of the top surface of the upper electrode embedded in the trench is improved. The polysilicon film formed over the semiconductor substrate to form a control gate electrode forming a memory cell of the MONOS memory is embedded in the trenches formed in the main surface of the semiconductor substrate in a capacitor element formation region, thereby to form the upper electrode including the polysilicon film in the trenches.


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