The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2017
Filed:
May. 10, 2016
Applicant:
Rosemount Aerospace Inc., Burnsville, MN (US);
Inventors:
Jim Golden, Afton, MN (US);
David Barwig, Plymouth, MN (US);
Assignee:
Rosemount Aerospace Inc., Burnsville, MN (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/4853 (2013.01); H01L 23/49811 (2013.01); H01L 2224/8192 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/81444 (2013.01); H01L 2224/81491 (2013.01); H01L 2224/81862 (2013.01); H01L 2924/0715 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/2064 (2013.01); H01L 2924/20105 (2013.01); H01L 2924/20641 (2013.01); H01L 2924/20642 (2013.01); H01L 2924/3511 (2013.01);
Abstract
An integrated circuit is attached to a substrate with a controlled stand-off height, by mounting a plurality of stud bumps of the controlled stand-off height to the substrate at predetermined locations, placing adhesive dots over the stud bumps, placing the integrated circuit on the substrate over the adhesive dots, and applying downward pressure on the integrated circuit until the integrated circuit is in mechanical contact with the stud bumps.