The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2017

Filed:

Jul. 08, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Suraj Kumar Patil, Ballston Lake, NY (US);

Ajey P. Jacob, Watervliet, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 27/115 (2017.01); H01L 29/788 (2006.01); H01L 27/092 (2006.01); H01L 29/49 (2006.01); H01L 21/302 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823885 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02389 (2013.01); H01L 21/02392 (2013.01); H01L 21/02395 (2013.01); H01L 21/02603 (2013.01); H01L 21/823807 (2013.01); H01L 27/092 (2013.01); H01L 29/0676 (2013.01); H01L 29/42392 (2013.01); H01L 29/78642 (2013.01); H01L 29/78681 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract

A method of forming Si or Ge-based and III-V based vertically integrated nanowires on a single substrate and the resulting device are provided. Embodiments include forming first trenches in a Si, Ge, III-V, or SiGesubstrate; forming a conformal SiN, SiOCNlayer over side and bottom surfaces of the first trenches; filling the first trenches with SiO; forming a first mask over portions of the Si, Ge, III-V, or SiGesubstrate; removing exposed portions of the Si, Ge, III-V, or SiGesubstrate, forming second trenches; forming III-V, III-VM, or Si nanowires in the second trenches; removing the first mask and forming a second mask over the III-VM, or Si nanowires and intervening first trenches; removing the SiOlayer, forming third trenches; and removing the second mask.


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