The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2017
Filed:
Oct. 11, 2013
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Terry Borer, Toronto, CA;
Gabriel Quan, Toronto, CA;
Stephen D. Brown, Toronto, CA;
Deshanand P. Singh, Mississauga, CA;
Chris Sanford, Toronto, CA;
Vaughn Betz, Toronto, CA;
Caroline Pantofaru, Menlo Park, CA;
Jordan Swartz, Toronto, CA;
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5077 (2013.01); G06F 17/5054 (2013.01); G06F 17/5068 (2013.01);
Abstract
A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.