The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2017
Filed:
Aug. 22, 2016
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
John Paul Lesso, Edinburgh, GB;
Emmanuel Philippe Christian Hardy, Edinburgh, GB;
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Abstract
This application relates to analogue-to-digital converters (ADCs). An ADChas a first converter () for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator () for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second converter () receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator (). A gain allocation block () generates the first and second conversion gain settings based on the time encoded signal (DT). The gain allocation block () may have a second PWM-to-digital modulator () which may be of lower latency and/or lower resolution that the first PWM-to-digital modulator ().