The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2017
Filed:
Mar. 05, 2010
Subhasish Mitra, Palo Alto, CA (US);
Nishant P. Patil, Mountain View, CA (US);
Chung Chun Wan, Fremont, CA (US);
H.-s. Philip Wong, Stanford, CA (US);
Subhasish Mitra, Palo Alto, CA (US);
Nishant P. Patil, Mountain View, CA (US);
Chung Chun Wan, Fremont, CA (US);
H.-S. Philip Wong, Stanford, CA (US);
THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY, Palo Alto, CA (US);
Abstract
A wafer-scale multiple carbon nanotube transfer process is provided. According to one embodiment of the invention, plasma exposure processes are performed at various stages of the fabrication process of a carbon nanotube device or article to improve feasibility and yield for successive transfers of nanotubes. In one such carbon nanotube transfer process, a carrier material is partially etched by a plasma process before removing the carrier material through, for example, a wet etch. By applying the subject plasma exposure processes, fabrication of ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics is facilitated. The ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics fabricated utilizing embodiments of the invention can be used, for example, to make high-performance carbon nanotube field effect transistors (CNFETs) and low cost, highly-transparent, and low-resistivity electrodes for solar cell and flat panel display applications. Further, three-dimensional CNFETs can be provided by utilizing the subject plasma exposure processes.