The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2017
Filed:
Mar. 22, 2012
Applicant:
Jeffry Kelber, Denton, TX (US);
Inventor:
Jeffry Kelber, Denton, TX (US);
Assignee:
QUANTUM DEVICES, LLC, Rockville, MD (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/16 (2006.01); H01L 29/778 (2006.01); B82Y 10/00 (2011.01); H01L 29/51 (2006.01); B82Y 40/00 (2011.01);
U.S. Cl.
CPC ...
H01L 29/1606 (2013.01); B82Y 10/00 (2013.01); H01L 29/778 (2013.01); B82Y 40/00 (2013.01); H01L 29/517 (2013.01);
Abstract
Graphene FETs exhibit low power consumption and high switching rates taking advantage of the excellent mobility in graphene deposited on a rocksalt oxide (111) by chemical vapor deposition, plasma vapor deposition or molecular beam epitaxy. A source, drain and electrical contacts are formed on the graphene layer. These devices exhibit band gap phenomena on the order of greater than about 0.5 eV, easily high enough to serve as high speed low power logic devices. Integration of this construction technology, based on the successful deposition of few layer graphene on the rocksalt oxide (111) with SI CMOS is straightforward.