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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9748283 B1

PDFFull Text
Date of Patent:
Aug. 29, 2017

Filed:

Mar. 20, 2015

System and method of manufacturing a thin film transistor substrate

Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Su-Kyoung Yang, Yongin-si, KR;

Sang-Won Shin, Yongin-si, KR;

Hyun-Eok Shin, Gwacheon-si, KR;

Chan-Woo Yang, Siheung-si, KR;

Dong-Min Lee, Anyang-si, KR;

Assignee:

Samsung Display Co., Ltd., , KR;

Attorney:

Innovation Counsel LLP

Primary Examiner:

Julio J Maldonado

Assistant Examiner:

Stanetta Isaac

Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); C23C 14/02 (2006.01); C23C 14/58 (2006.01); C23C 14/54 (2006.01); H01J 37/34 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1259 (2013.01); C23C 14/02 (2013.01); C23C 14/541 (2013.01); C23C 14/5806 (2013.01); H01L 21/28008 (2013.01); H01L 29/42356 (2013.01); H01L 29/42372 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01); H01L 29/495 (2013.01); H01L 29/4908 (2013.01); H01L 29/66742 (2013.01); H01J 37/34 (2013.01);
Abstract

In a method of manufacturing a thin film transistor substrate, a first metal layer is formed on a first surface of a base substrate. The base substrate is cooled by contacting the first metal layer with a first cooling plate and by contacting a second surface of the base substrate with a second cooling plate. The first and second surfaces of the base substrate face opposite directions. A gate electrode is formed by patterning the first metal layer. A source electrode and a drain electrode are formed. The source electrode is spaced apart from the drain electrode. The source and drain electrodes partially overlap the gate electrode. A pixel electrode electrically connected to the drain electrode is formed.

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