The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2017

Filed:

Aug. 21, 2015
Applicants:

Jae-goo Lee, Suwon-si, KR;

Young-woo Park, Cheonan-si, KR;

Inventors:

Jae-goo Lee, Suwon-si, KR;

Young-woo Park, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/11582 (2017.01); H01L 21/28 (2006.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/28282 (2013.01); H01L 27/11575 (2013.01);
Abstract

A method of fabricating a memory device includes alternately stacking a plurality of insulating layers and a plurality of sacrificial layers on a substrate, forming a channel hole by etching the insulating layers and the sacrificial layers to expose a partial region of the substrate, forming a channel structure in the channel hole, forming an opening by etching the insulating layers and the sacrificial layers to exposed a portion of the substrate, forming a plurality of side openings that include first side openings and a second side opening by removing the sacrificial layers through the opening, forming gate electrodes to fill the first side openings, and forming a blocking layer to fill the second side opening.


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