The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2017
Filed:
Dec. 08, 2015
Applicants:
Jaehan Lee, Seoul, KR;
Won-seok Jung, Anyang-si, KR;
Kyungjoong Joo, Suwon-si, KR;
Inventors:
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 27/11565 (2017.01); H01L 27/11524 (2017.01); H01L 27/11512 (2017.01); H01L 27/11556 (2017.01); H01L 27/1157 (2017.01); H01L 27/11573 (2017.01); H01L 27/11575 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11565 (2013.01); H01L 27/1157 (2013.01); H01L 27/11512 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11573 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01);
Abstract
Provided are semiconductor devices and methods of fabricating the same. The semiconductor devices may include a substrate with a cell region and a peripheral region, a gate stack including gates stacked on the cell region of the substrate. At least one edge portion of the gate stack may have a staircase structure. The semiconductor devices may also include a channel that extend through the gate stack and is enclosed by a memory layer and at least two dummy patterns on the substrate. The at least two dummy patterns may be spaced apart from the gate stack and may be spaced apart from each other.