The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2017

Filed:

Sep. 14, 2015
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Balaji Padmanabhan, Tempe, AZ (US);

Prasad Venkatraman, Gilbert, AZ (US);

Zia Hossain, Tempe, AZ (US);

Chun-Li Liu, Scottsdale, AZ (US);

Jason McDonald, Gilbert, AZ (US);

Ali Salih, Mesa, AZ (US);

Alexander Young, Scottsdale, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 27/06 (2006.01); H01L 27/02 (2006.01); H01L 23/367 (2006.01); H01L 29/417 (2006.01); H01L 29/778 (2006.01); H01L 29/10 (2006.01); H01L 21/8258 (2006.01); H01L 21/74 (2006.01); H01L 29/872 (2006.01); H01L 23/48 (2006.01); H01L 29/861 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/743 (2013.01); H01L 21/8258 (2013.01); H01L 23/3677 (2013.01); H01L 27/0255 (2013.01); H01L 27/0266 (2013.01); H01L 27/0688 (2013.01); H01L 29/1087 (2013.01); H01L 29/41766 (2013.01); H01L 29/7783 (2013.01); H01L 23/481 (2013.01); H01L 29/2003 (2013.01); H01L 29/861 (2013.01); H01L 29/872 (2013.01); H01L 2924/0002 (2013.01);
Abstract

In one embodiment, a group III-V transistor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A clamping device is integrated with the group III-V transistor structure and is electrically connected to the first current carrying electrode a third electrode to provide a secondary current path during, for example, an electrical stress event.


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