The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

May. 08, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Yanfei Cai, Shanghai, CN;

Qiang Dai, Shanghai, CN;

Shuangqu Huang, Shanghai, CN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 3/3562 (2006.01); H03K 3/012 (2006.01);
U.S. Cl.
CPC ...
H03K 3/35625 (2013.01); H03K 3/012 (2013.01);
Abstract

A flip-flop circuit may include a first latch and a second latch. The first latch, which may operate as a 'master' latch, includes a first input terminal to receive a data signal, a second input terminal to receive a clock signal, and an output terminal. The second latch, which may operate as a 'slave' latch, includes a first input terminal connected directly to the output terminal of the first latch, a second input terminal to receive the clock signal, and an output terminal to provide an output signal. The first latch and the second latch are to be clocked on the same phase of the clock signal, thereby eliminating the need to include clock inversion circuits that generate complementary clock signals.


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