The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

Apr. 16, 2015
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Ke Wang, Beijing, CN;

Seongyeol Yoo, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); H01L 29/786 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); G02F 1/13439 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 29/7869 (2013.01); G02F 1/1368 (2013.01); G02F 2001/136295 (2013.01);
Abstract

The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors.


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