The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

Apr. 01, 2014
Applicant:

Su Zhou Oriental Semiconductor Co., Ltd., Suzhou, Jiangsu, CN;

Inventors:

Wei Liu, Jiangsu, CN;

Lei Liu, Jiangsu, CN;

Pengfei Wang, Jiangsu, CN;

Yi Gong, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/76 (2006.01); H01L 27/11521 (2017.01); H01L 29/423 (2006.01); H01L 27/06 (2006.01); H01L 29/49 (2006.01); H01L 29/10 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 21/336 (2006.01); H01L 27/07 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 21/28273 (2013.01); H01L 27/0629 (2013.01); H01L 29/1037 (2013.01); H01L 29/42324 (2013.01); H01L 29/42336 (2013.01); H01L 29/42364 (2013.01); H01L 29/4916 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01); H01L 27/0727 (2013.01);
Abstract

A semiconductor memory with a U-shaped channel comprises: a U-shaped channel region arranged in a semiconductor substrate, a source region, a drain region, a first layer of insulation film arranged on the U-shaped channel region, a floating gate provided with a notch, a second layer of insulation film, a control gate, a p-n junction diode arranged between the floating gate and the drain region, and a gate controlled diode formed by the control gate, the second layer of insulation film, and the p-n junction diode and using the control gate as a gate. Under the precondition of not increasing the manufacturing cost and difficulty of the semiconductor memory with a U-shaped channel and not affecting the performance of the semiconductor memory with a U-shaped channel, the dimension of a semiconductor storage device is further reduced and the chip density is increased by arranging the notch in the floating gate.


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