The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2017
Filed:
Apr. 06, 2016
Murata Manufacturing Co., Ltd., Nagaokakyo-shi, Kyoto-fu, JP;
Mitsutoshi Kawamoto, Nagaokakyo, JP;
MURATA MANUFACTURING CO., LTD., Nagaokakyo-Shi, Kyoto-Fu, JP;
Abstract
A component body is obtained by alternately laminating and sintering a plurality of semiconductor ceramic layers formed of a SrTiO-based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers. The average grain diameter of crystal grains is 1.0 ∝m or less and a coefficient of variation representing variations in a grain diameter of the crystal grains is 30% or less. To prepare the semiconductor ceramic an Sr compound, a Ti compound and a donor compound are weighed in predetermined amounts and mixed/pulverized. A calcined powder is prepared and a dispersant is added with an acceptor compound to the calcined powder. The resulting mixture is wet-mixed and a heat-treated powder is prepared. The heat-treated powder is formed into slurry and subjected to a filter treatment. The filtered slurry is used to prepare a semiconductor ceramic. The resulting laminated semiconductor ceramic capacitor has a varistor function having excellent durability, which can suppress a reduction of insulating properties and ensure desired electrical characteristics even when ESD occurs repeatedly.