The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

Apr. 13, 2015
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, JP;

Inventor:

Hiroyuki Takahashi, Kawasaki, JP;

Assignee:

RENESAS ELECTRONICS CORPORATION, Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01); G06F 13/42 (2006.01); G06F 11/10 (2006.01); G11C 7/02 (2006.01); G11C 7/10 (2006.01); G11C 11/4093 (2006.01); G11C 29/52 (2006.01); G06F 13/40 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4221 (2013.01); G06F 11/10 (2013.01); G06F 13/4072 (2013.01); G06F 13/4234 (2013.01); G11C 7/02 (2013.01); G11C 7/1006 (2013.01); G11C 11/4093 (2013.01); G11C 29/52 (2013.01); G11C 2029/0411 (2013.01); G11C 2207/107 (2013.01); Y02B 60/1228 (2013.01); Y02B 60/1235 (2013.01);
Abstract

Provided is a data bus driving circuit including: a data processing unit that processes input data and outputs processed data; a first logic inversion unit that selects, based on a determination result signal, one of the processed data and inverted data obtained by logically inverting each value of a plurality of bits constituting the processed data, and outputs the selected data to a data bus; and an inversion determination unit that compares the data output from the first logic inversion unit with the input data that has not been processed by the data processing unit, and outputs the determination result signal based on a comparison result.


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