The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2017

Filed:

Nov. 18, 2015
Applicant:

Marvell World Trade Ltd., St. Michael, BB;

Inventors:

Nafea Bishara, San Jose, CA (US);

William Lo, Cupertino, CA (US);

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01); H04J 3/16 (2006.01); G06F 5/06 (2006.01); H04L 12/40 (2006.01); H04L 12/801 (2013.01); H04L 12/815 (2013.01); H04L 12/861 (2013.01); G06F 12/02 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 5/065 (2013.01); G06F 12/023 (2013.01); G06F 13/4234 (2013.01); H04L 12/4013 (2013.01); H04L 47/10 (2013.01); H04L 47/22 (2013.01); H04L 49/90 (2013.01); H04L 49/9078 (2013.01); H04L 49/9084 (2013.01); G06F 2205/067 (2013.01); Y02B 60/31 (2013.01);
Abstract

A physical-layer circuit including a memory, a physical-layer device and a control circuit. The memory receives data from a media access controller (MAC) at a first rate. The MAC is separate from the physical-layer circuit. The physical-layer device receives the data from the memory and transmits the data from the physical-layer circuit to a peer device. The physical-layer device transfers the data from the memory to the peer device at a second rate. An amount of data stored in the memory is based on a difference between the first and second rates. The second rate is less than the first rate. The control circuit is connected between the memory and the physical layer device. The control circuit monitors the amount of the data stored in the memory and, based on the amount of the data stored in the memory, transmits a frame to the MAC to decrease the first rate.


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