The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Nov. 10, 2016
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventor:

Jin Kyu Kim, Sejong, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/14 (2006.01); H04L 27/26 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
H04L 27/265 (2013.01); G06F 9/3001 (2013.01); G06F 17/141 (2013.01); G06F 17/142 (2013.01);
Abstract

Provided is a fully parallel fast Fourier transformer of N-point, where N is a natural number, including a bit-reversal arranging block configured to rearrange an order of N input complex number samples, a plurality of first processors configured to perform, in a plurality of group units, a 16-point FFT on the rearranged complex number samples, a twiddle factor multiplier configured to multiply outputs of the plurality of first processors by twiddle factors, a first group rearranging block configured to rearrange outputs of the twiddle factor multiplier in the plurality of group units, a plurality of second processors configured to perform, in the plurality of group units, 16-point FFT on the complex number samples grouped by the first group rearranging block, and a second group rearranging block configured to rearrange outputs of the plurality of second processors to output under a same arrangement criterion as the first group rearranging block.


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