The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Sep. 09, 2016
Applicant:

Hella Kgaa Hueck & Co., Lippstadt, DE;

Inventors:

Juncheng Lu, Flint, MI (US);

Hua Bai, Flint, MI (US);

Hui Teng, Flint, MI (US);

Assignee:

Hella KGaA Hueck & Co., Lippstadt, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01); H03K 3/00 (2006.01); H03K 17/284 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01); H01L 29/16 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H03K 17/284 (2013.01); H01L 29/16 (2013.01); H01L 29/2003 (2013.01); H01L 29/7787 (2013.01); H01L 29/7805 (2013.01);
Abstract

A hybrid switch apparatus includes a gate drive circuit producing a gate drive signal, a GaN high electron mobility transistor (HEMT) having a first gate, a first drain, and a first source. A silicon (Si) MOSFET has a second gate, a second drain, and a second source. The GaN HEMT and the Si MOSFET are connected in a parallel arrangement so that (i) the first drain and the second drain are electrically connected and (ii) the first source and the second source are electrically connected. The second gate is connected to the gate drive circuit output to receive the gate drive signal. A delay block has an input connected to the gate drive circuit output and an delay block output is configured to produce a delayed gate drive signal for driving the GaN HEMT.


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