The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Jul. 07, 2016
Applicant:

Magnachip Semiconductor, Ltd., Cheongju-si, KR;

Inventors:

Tae Ho Kim, Cheongju-si, KR;

Kyung Ho Lee, Cheongju-si, KR;

Young Chul Seo, Gwangmyeong-si, KR;

Sung Jin Choi, Cheongju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/788 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7885 (2013.01); H01L 29/42328 (2013.01); H01L 29/66825 (2013.01); H01L 29/7833 (2013.01);
Abstract

A one-time programmable non-volatile memory device includes a first conductivity type well region located in a semiconductor substrate, a selection gate electrode and a floating gate electrode located on the substrate, a first doped region located between the selection gate electrode and the floating gate electrode, a second conductivity type source region located on one side of the selection gate electrode, and a second conductivity type drain region located on one side of the floating gate electrode, wherein a depth of the drain region has a depth shallower than that of the first doped region with respect to a top surface of the substrate.


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