The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Apr. 29, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Farrukh Aquil, San Diego, CA (US);

Michael Drop, La Mesa, CA (US);

Vaishnav Srinivas, San Diego, CA (US);

Philip Clovis, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/409 (2006.01); G11C 11/408 (2006.01); G11C 11/4093 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4093 (2013.01); G11C 11/4082 (2013.01); G11C 11/4087 (2013.01); G11C 11/4096 (2013.01);
Abstract

Systems and methods are disclosed for configuring dynamic random access memory (DRAM) in a personal computing device (PCD). An exemplary method includes providing a shared command access (CA) bus in communication with a first DRAM and a second DRAM. A first command from a system on a chip (SoC) is received at the first DRAM and the second DRAM. A decoder of the first DRAM determines whether to mask a mode register write (MRW) in response to the received first command. A second command containing configuration information is received vie the shared CA bus at the first DRAM and the second DRAM. Responsive to the determination by the decoder of the first DRAM, the received MRW is either ignored or implemented by the first DRAM.


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