The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Nov. 18, 2014
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Chao-Tang Lee, Pingtung County, TW;

Cheng-Chun Tu, Hsinchu, TW;

Tzi-Cker Chiueh, Taipei, TW;

Shu-Hao Hsu, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/36 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4221 (2013.01); G06F 13/404 (2013.01); G06F 13/4022 (2013.01);
Abstract

A memory mapping method for coupling a plurality of servers with a PCI express bus is disclosed. The method comprises: configuring an extended memory address on a management host having a memory address; mapping the extended memory address of the management host corresponding to each of the servers to memory addresses of each of the servers respectively by a plurality of non-transparent bridges of the PCI express bus; configuring an extended memory address on each of the servers; and mapping the extended memory address of each of the servers to the memory address and the extended memory address of the management host by the non-transparent bridges, the extended memory address of each of the servers corresponding to the servers and the management host.


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