The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2017
Filed:
Dec. 31, 2013
Peking University, Beijing, CN;
Lifeng Liu, Beijing, CN;
Yi Hou, Beijing, CN;
Bing Chen, Beijing, CN;
Bin Gao, Beijing, CN;
Dedong Han, Beijing, CN;
Yi Wang, Beijing, CN;
Xiaoyan Liu, Beijing, CN;
Jinfeng Kang, Beijing, CN;
Yuhua Cheng, Beijing, CN;
PEKING UNIVERSITY, Beijing, CN;
Abstract
The present disclosure discloses a full adder based on resistive-switching devices and an operation method thereof. A multi-bit full adder circuit is constituted by using a cross-bar array of resistive-switching devices, wherein data of standard sums is stored on the principle diagonal of the cross-bar array in a nonvolatile manner, and carry data is stored in adjacent units on both sides of the principle diagonal. The carry data is stored according to whether the storage loop (crosstalk loop) is turned on. With the present disclosure, the multi-bit full adder circuit is significantly simplified. Thereby, additional circuits for generating a carry signal are reduced, the circuit delay and chip area are decreased, and the adder has an ability of nonvolatile storage.