The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Sep. 16, 2016
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Joseph Julicher, Maricopa, AZ (US);

Pieter Schieke, Phoenix, AZ (US);

Vivien Delport, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 4/00 (2006.01); G06F 13/10 (2006.01); G06F 1/32 (2006.01); H02J 7/00 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01); H04B 3/54 (2006.01); H04L 12/10 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3246 (2013.01); G06F 13/4022 (2013.01); G06F 13/4072 (2013.01); G06F 13/4291 (2013.01); H02J 4/00 (2013.01); H02J 7/00 (2013.01); H02M 3/158 (2013.01); H04B 3/542 (2013.01); H04B 3/548 (2013.01); H04L 12/10 (2013.01); Y10T 307/74 (2015.04);
Abstract

A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device.


Find Patent Forward Citations

Julicher, Joseph. (2017). Combined power supply and input/output system with boost capability (U.S. Patent No. 9733693). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9733693

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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