The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Apr. 05, 2016
Applicant:

Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;

Inventors:

Atsushi Igarashi, Chiba, JP;

Nao Otsuka, Chiba, JP;

Masakazu Sugiura, Chiba, JP;

Assignee:

SII SEMICONDUCTOR CORPORATION, Chiba-Shi, Chiba, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01); H03F 3/45 (2006.01); H03K 5/08 (2006.01);
U.S. Cl.
CPC ...
G01R 19/0092 (2013.01); H03F 3/45273 (2013.01); H03K 5/08 (2013.01); H03F 2200/91 (2013.01);
Abstract

To provide a current detection circuit capable of suppressing the occurrence of a large potential difference between input terminals of a differential amplifier circuit, and preventing degradation of input transistors. A differential amplifier circuit is equipped with a clamp circuit which limits gate-source voltages of a pair of PMOS transistors each having a bulk and a source connected to each other with the sources of the pair of PMOS transistors as input terminals.


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