The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2017
Filed:
Nov. 28, 2012
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventor:
Yu Jin Lee, Icheon-si, KR;
Assignee:
SK HYNIK INC., Icheon, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/62 (2006.01); H01L 21/56 (2006.01); H01L 23/525 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/62 (2013.01); H01L 21/56 (2013.01); H01L 23/5258 (2013.01); H01L 23/564 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A semiconductor device includes a fuse pattern disposed over a semiconductor substrate, an epoxy mold compound (EMC) layer disposed over the fuse pattern, a first package substrate disposed over the EMC layer, an insulating film disposed over the first package substrate, and a second package substrate disposed over the insulating film. To the first package substrate, a Vss voltage or a negative voltage lower than the Vss voltage is applied to prevent impurities from migrating to the fuse pattern.