The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2017

Filed:

Nov. 27, 2014
Applicant:

Capital Microelectronics Co., Ltd., Beijing, CN;

Inventors:

Jia Geng, Beijing, CN;

Yuanpeng Wang, Beijing, CN;

Ping Fan, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G06F 11/10 (2006.01); G11C 7/10 (2006.01); G06F 3/06 (2006.01); G11C 29/52 (2006.01); H03M 13/29 (2006.01); G06F 5/10 (2006.01); H03M 13/05 (2006.01); H03M 13/19 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0629 (2013.01); G06F 3/0679 (2013.01); G06F 5/10 (2013.01); G06F 11/1028 (2013.01); G06F 11/1048 (2013.01); G11C 7/10 (2013.01); G11C 29/52 (2013.01); H03M 13/05 (2013.01); H03M 13/2906 (2013.01); G11C 7/1075 (2013.01); G11C 2029/0411 (2013.01); H03M 13/19 (2013.01);
Abstract

A configuration structure and method of a block memory. The configuration structure includes a first port, a second port, an ECC module, and an FIFO module; the ECC module includes an ECC encoder and an ECC decoder; the FIFO module is used for setting the first clock enable terminal and the second clock enable terminal, so as to make the read clock synchronous or asynchronous with and the write clock of the block memory. The read width and the write width of the block memory can be independently configured, and the block memory has built-in an ECC function and a FIFO function, and can be cascaded to a block memory with larger storage space without consuming additional logic resource.


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