The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2017

Filed:

Apr. 02, 2015
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Rungrot Kitsomboonloha, Cupertino, CA (US);

Chun-Yao Huang, Cupertino, CA (US);

Shih Chang Chang, Cupertino, CA (US);

Szu-Hsien Lee, Cupertino, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/041 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0416 (2013.01); G09G 3/3677 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0218 (2013.01); G09G 2310/0267 (2013.01); G09G 2320/043 (2013.01);
Abstract

A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include blocks of gate driver circuits each having an output coupled to a respective one of the gate lines. The gate driver circuits of each block are coupled in a chain to form a shift register. Each block has a local block-level gate start pulse generator. The display driver circuitry has a display driver circuit that supplies a gate start pulse clock to each of the local block-level gate start pulse generators. The local block-level gate start pulse generators create gate start pulses that are applied to the first gate driver circuit in each shift register. The display driver circuit may delay the gate start pulse clock when it is desired to implement an intraframe pause.


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