The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2017
Filed:
Jul. 01, 2016
Applicant:
Cypress Semiconductor Corporation, San Jose, CA (US);
Inventors:
Anup Nayak, Fremont, CA (US);
Ramakrishna Venigalla, Bangalore, IN;
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/00 (2006.01); H01L 29/76 (2006.01); H01L 29/772 (2006.01); G06F 1/32 (2006.01); G06F 13/42 (2006.01); G06F 13/38 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 13/385 (2013.01); G06F 13/4282 (2013.01);
Abstract
Techniques for power Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a device comprises a Universal Serial Bus (USB) subsystem that is disposed in a monolithic integrated circuit (IC). The USB subsystem comprises a gate-driver circuit configured to selectively control an external N-channel power-FET or an external P-channel power-FET.