The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2017
Filed:
Mar. 24, 2016
Renesas Electronics Corporation, Tokyo, JP;
Takahiro Kawano, Tokyo, JP;
Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;
Abstract
A semiconductor device includes an analog-digital converter circuit. The analog-digital converter circuit includes a delay cell array that includes n-number (n is a natural number of 2 or more) of serially-coupled delay cells, receives a reference clock signal, and utilizes an analog input signal as the power supply voltage for delay cells in each stage, and an encoder that encodes the output signal of the delay cells in each stage of the delay cell array. The n number of delay cells include a delay quantity weighted for each delay cell, and the encoder encodes the output signal of the delay cell in each stage of the delay cell array by weighting corresponding to the number of delay cell stages. The delay cells output signal without changing polarity of inputted signals.