Circuit arrangement for and a method of enabling a partial reconfiguration of a circuit implemented in an integrated circuit device

Abstract

A circuit arrangement for enabling a partial reconfiguration of a circuit implemented in an integrated circuit device is described. The circuit arrangement comprises a plurality of circuit blocks, wherein each circuit block is configurable to implement a predetermined function and comprises a control circuit configured to receive a global enable signal and a plurality of global reconfiguration signals; and a routing network coupled to the plurality of circuit blocks for routing the global enable signal and the plurality of global reconfiguration signals to each circuit block of the plurality of circuit blocks; wherein each circuit block of the plurality of circuit blocks is configured to independently receive a local enable signal enabling a partial reconfiguration of the circuit in response to the plurality of global reconfiguration signals.