The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Jun. 06, 2014
Applicant:

Japan Science and Technology Agency, Kawaguchi-shi, Saitama, JP;

Inventors:

Akira Toriumi, Tokyo, JP;

Toshiyuki Tabata, Tokyo, JP;

Choong Hyun Lee, Tokyo, JP;

Tomonori Nishimura, Tokyo, JP;

Cimang Lu, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/16 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/324 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); C23C 14/08 (2006.01); C23C 14/35 (2006.01);
U.S. Cl.
CPC ...
H01L 29/16 (2013.01); H01L 21/02112 (2013.01); H01L 21/02266 (2013.01); H01L 21/28255 (2013.01); H01L 21/3247 (2013.01); H01L 29/517 (2013.01); H01L 29/66477 (2013.01); H01L 29/78 (2013.01); C23C 14/083 (2013.01); C23C 14/086 (2013.01); C23C 14/352 (2013.01);
Abstract

A semiconductor structure includes: a germanium layer; and a first insulating film that is formed on an upper surface of the germanium layer, primarily contains germanium oxide and a substance having an oxygen potential lower than an oxygen potential of germanium oxide, and has a physical film thickness of 3 nm or less; wherein a half width of frequency to height in a 1 μm square area of the upper surface of the germanium layer is 0.7 nm or less.


Find Patent Forward Citations

Toriumi, Akira. (2017). Semiconductor structure in which film including germanium oxide is provided on germanium layer, and method for manufacturing semiconductor structure (U.S. Patent No. 9722026). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9722026

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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