Thin film transistor and fabrication method thereof, array substrate and display panel

Abstract

A thin film transistor and a fabrication method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a gate electrode (), a source electrode () and a drain electrode () disposed in a same layer on a base substrate (); a gate insulating layer () disposed on the gate electrode (), the source electrode () and the drain electrode (); an active layer () disposed on the gate insulating layer (); a passivation layer () disposed on the active layer () and the gate insulating layer (). A first via hole () and a second via hole () are disposed in the passivation layer (); a third via hole () and a fourth via hole () are disposed in the passivation layer () and the gate insulating layer (); a first connection pattern () and a second connection pattern () are disposed on the passivation layer (); the first connection pattern () is connected with the active layer () and the source electrode () through the first via hole () and the third via hole () respectively; the second connection pattern () is connected with the active layer () and the drain electrode () through the second via hole () and the fourth via hole () respectively. The thin film transistor effectively reduces the influence of the parasitic capacitance between the source electrode and the gate electrode and the parasitic capacitance between the drain electrode and the gate electrode on the thin film transistor.