The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Jul. 30, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Michael Billeci, Poughkeepsie, NY (US);

Uwe Brandt, Boeblingen, DE;

Christian Jacobi, Poughkeepsie, NY (US);

Martin Recktenwald, Boeblingen, DE;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 12/0802 (2016.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 11/073 (2013.01); G06F 11/0727 (2013.01); G06F 11/1064 (2013.01); G06F 12/0802 (2013.01); G06F 2212/1032 (2013.01);
Abstract

Uncorrectable memory errors in pipelined central processing units. A processor core may be connected to a memory system and it may include a processor cache. In response to determining an uncorrectable error in data stored in the memory system, the address of a memory location of the uncorrectable error is stored in an address buffer and a recovery procedure is performed for the processor core. When fetching data from a memory location and if it is determined that the address of this memory location is stored in the address buffer, the content of a cache line related to the address is moved into a quarantine buffer of the processor core. When detecting an error in the data of the moved cache line, a repair procedure for the data of this address is triggered.


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