The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Mar. 02, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

June-Hee Lee, Yongin-si, KR;

Bong-Kyu Kim, Suwon-si, KR;

Dong-Chul Choi, Yongin-si, KR;

Gun-Il Kang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); G06F 13/42 (2006.01); G06F 1/10 (2006.01); G06F 13/40 (2006.01); G06F 1/14 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 1/12 (2013.01); G06F 13/4022 (2013.01); G06F 1/14 (2013.01);
Abstract

A clock switch device includes a controller and a switching circuit. The controller sets a clock switch period using a control signal when a logic level of a mode signal is changed. The switching circuit receives a first clock signal, a second clock signal and an auxiliary clock signal. The switching circuit, based on the control signal, outputs one clock signal between the first clock signal and the second clock signal as a glitch free clock signal before the clock switch period, stops outputting the one clock signal and outputs the auxiliary clock signal as the glitch free clock signal during the clock switch period, and stops outputting the auxiliary clock signal and outputs another clock signal between the first clock signal and the second clock signal as the glitch free clock signal after the clock switch period.


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