The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Jun. 12, 2014
Applicant:

Agency for Science, Technology and Research, Singapore, SG;

Inventors:

Xin Liu, Singapore, SG;

Jun Zhou, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); A61B 5/04 (2006.01); A61B 5/00 (2006.01); A61B 5/0428 (2006.01); A61B 5/0472 (2006.01); A61B 5/0476 (2006.01); G01R 19/25 (2006.01);
U.S. Cl.
CPC ...
A61B 5/04012 (2013.01); A61B 5/0428 (2013.01); A61B 5/0472 (2013.01); A61B 5/4812 (2013.01); A61B 5/7203 (2013.01); A61B 5/0476 (2013.01); A61B 5/4836 (2013.01); G01R 19/2509 (2013.01);
Abstract

An electrocardiogram (ECG) signal processing system is provided. The ECG signal processing system comprises an analog-to-digital converter (ADC) configured to convert an input analog ECG signal into a digital ECG signal, and a digital signal processing engine (DSPE) coupled to the ADC to receive the digital ECG signal. The DSPE is configured to decompose and reconstruct the digital ECG signal. A dynamic system clock source is coupled to the ADC and the DSPE for dynamic signal sampling, the dynamic system clock source clocking the ADC and the DSPE at a first frequency fto detect one or more first parameters of the input analog ECG signal and at a second frequency fto detect one or more second parameters of the input analog ECG signal.


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